以ATMEGA324p為例,為大家介紹其基本特性,供大家參考學習。
ATMEGA324PFeatures
High-performance, Low-power AVR ATMEGA324P8-bit Microcontroller
Advanced RISC Architecture
- 130 Powerful Instructions - Most Single-clock Cycle ATMEGA324P Execution
- 32 x 8 General Purpose ATMEGA324P Working Registers
- Fully Static Operation
- Up to 16 MIPS ATMEGA324P Throughput at 16 MHz
- On-chip 2-cycle Multiplier
Nonvolatile Program and ATMEGA324P Data Memories
- 8K Bytes of In-System ATMEGA324P Self-Programmable Flash
Endurance: 10,000 Write/Erase Cycles
- Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
- 512 Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
- 1K Byte Internal ATMEGA324P SRAM
- Programming Lock for Software Security
Peripheral Features
- Two 8-bit Timer/Counters with Separate Prescaler, one Compare Mode
- One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
- Real Time Counter with Separate Oscillator
- Three PWM Channels
- 8-channel ADC in TQFP ATMEGA324P and MLF package
Six Channels 10-bit Accuracy
Two Channels 8-bit Accuracy
- 6-channel ADC in PDIP package
Four Channels 10-bit Accuracy
Two Channels 8-bit ATMEGA324P Accuracy
- Byte-oriented Two-wire Serial Interface
- Programmable Serial USART
- Master/Slave SPI Serial Interface
- Programmable Watchdog ATMEGA324P Timer with Separate On-chip Oscillator
- On-chip Analog Comparator
Special Microcontroller Features
- Power-on Reset and Programmable Brown-out Detection
- Internal Calibrated RC Oscillator
- External and Internal Interrupt Sources
- Five Sleep Modes: Idle, ATMEGA324P ADC Noise Reduction, Power-save, Power-down, and
Standby
I/O and Packages
- 23 Programmable I/O Lines
- 28-lead PDIP, ATMEGA324P 32-lead TQFP, and 32-pad MLF
Operating Voltages
- 2.7 - 5.5V (ATMEGA324P)
- 4.5 - 5.5V (ATMEGA324P)
Speed Grades
- 0 - 8 MHz (ATMEGA324P)
- 0 - 16 MHz (ATMEGA324P)
Power Consumption at 4 Mhz, 3V, 25°C
- Active: 3.6 mA
- Idle Mode: 1.0 mA
- Power-down Mode: 0.5
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